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Information on didactic, research and institutional assignments on this page are certified by the University; more information, prepared by the professor, are available on the personal web page and in the curriculum vitae indicated on this webpage.
Information on professor
ProfessorSantambrogio Marco Domenico
QualificationAssociate professor full time
Belonging DepartmentDipartimento di Elettronica, Informazione e Bioingegneria
Scientific-Disciplinary SectorING-INF/05 - Information Processing Systems
Curriculum VitaeDownload CV (293.8Kb - 27/05/2017)

Professor's office hours
DEI----ThursdayFrom 09:00
To 11:00
Professor's personal websitehttp://home.dei.polimi.it/santambr/

Data source: RE.PUBLIC@POLIMI - Research Publications at Politecnico di Milano

List of publications and reserach products for the year 2020
No product yet registered in the year 2020

List of publications and reserach products for the year 2019 (Show all details | Hide all details)
Type Title of the Publicaiton/Product
An FPGA-based computing infrastructure tailored to efficiently scaffold genome sequences (Show >>)
Automated acceleration of dataflow-oriented c applications on FPGA-based systems (Show >>)
Automated design space exploration and roofline analysis for FPGA-based hls applications (Show >>)
Metodo di allineamento di stringhe di caratteri che rappresentano dati genomici e relativo dispositivo hardware (Show >>)
Contributions on scientific books
Continuous Blood Pressure Estimation Through Optimized Echo State Networks (Show >>)
Conference proceedings
A Case Study for an Accelerated DCNN on FPGA-based Embedded Distributed System (Show >>)
AIRBOX: A monitoring system of physiological parameters and mind performance in microclimate-controlled environment (Show >>)
Building High-Performance, Easy-to-use Polymorphic Parallel Memories with HLS (Show >>)
CircFA: A FPGA-based circular RNA aligner (Show >>)
Diversity and inclusion: Buzzword or real value? (Show >>)
Exploring transductive and inductive methods for vertex embedding in biological networks (Show >>)
FPGA-based Embedded System Implementation of Audio Signal Alignment (Show >>)
Fast and Accurate Entity Linking via Graph Embedding (Show >>)
Fog Acceleration through Reconfigurable Devices (Show >>)
HLS Support for Polymorphic Parallel Memories (Show >>)
Motion discrimination by ambient cellular signals: machine learning and computing tools (Show >>)
Pareto Optimal Design Space Exploration for Accelerated CNN on FPGA (Show >>)
Solving write conflicts in GPU-accelerated graph computation: A PageRank case-study (Show >>)
Speeding up resting state networks recognition via a hardware accelerator (Show >>)
Towards an automatic imaging biopsy of non-small cell lung cancer (Show >>)
Journal Articles
Performance-aware load shedding for monitoring events in container based environments (Show >>)

List of publications and reserach products for the year 2018 (Show all details | Hide all details)
Type Title of the Publicaiton/Product
Conference proceedings
A Parallel, Energy Efficient Hardware Architecture for the merAligner on FPGA Using Chisel HCL (Show >>)
A Scalable FPGA Design for Cloud N-Body Simulation (Show >>)
A Unified Backend for Targeting FPGAs from DSLs (Show >>)
A framework with cloud integration for CNN acceleration on FPGA devices (Show >>)
An FPGA-based acceleration methodology and performance model for iterative stencils (Show >>)
Automating Lung Cancer Identification in PET/CT Imaging (Show >>)
DEEP-mon: Dynamic and energy efficient power monitoring for container-based infrastructures (Show >>)
EXTRA: An open platform for reconfigurable architectures (Show >>)
Energy Efficiency for Autonomic Scalable Systems: Research Objectives and Preliminary Results (Show >>)
FIDA: A framework to automatically integrate FPGA kernels within data-science applications (Show >>)
FPGA-based PairHMM Forward Algorithm for DNA Variant Calling (Show >>)
FPGA-based muscle synergy extraction for surface EMG gesture classification (Show >>)
Five-point algorithm: An efficient cloud-based FPGA implementation (Show >>)
HyPPO: Hybrid Performance-Aware Power-Capping Orchestrator (Show >>)
OXiGen: A tool for automatic acceleration of c functions into dataflow FPGA-based kernels (Show >>)
On how to efficiently implement deep learning algorithms on PYNQ platform (Show >>)
Pretzel: Opening the black box of machine learning prediction serving systems (Show >>)
Robustness of surface EMG classifiers with fixed-point decomposition on reconfigurable architecture (Show >>)
TiReX: Tiled regular expression matching architecture (Show >>)
Journal Articles
A runtime controller for openCL applications on heterogeneous system architectures (Show >>)
Toward smart building design automation: Extensible CAD framework for indoor localization systems deployment (Show >>)

List of publications and reserach products for the year 2017 (Show all details | Hide all details)
Type Title of the Publicaiton/Product
Metodo per la localizzazione di un dispositivo all'interno di un’area (Show >>)
Conference proceedings
A CAD Open Platform for High Performance Reconfigurable Systems in the EXTRA Project (Show >>)
A Feedback-Based Design Space Exploration Subsystem for the Automation of Architectures Synthesis on Proprietary FPGA Toolchains (Show >>)
A common backend for hardware acceleration on FPGA (Show >>)
A fog-computing architecture for preventive healthcare and assisted living in smart ambients (Show >>)
A hardware acceleration for surface EMG non-negative matrix factorization (Show >>)
A highly scalable and efficient parallel design of N-body simulation on FPGA (Show >>)
A pipelined and scalable dataflow implementation of convolutional neural networks on FPGA (Show >>)
A wearable device for blind people to restore color perception (Show >>)
An embedded Gabor-based palm vein recognition system (Show >>)
Architectural optimizations for high performance and energy efficient Smith-Waterman implementation on FPGAs using OpenCL (Show >>)
BIE-PInCS: Brain injury evaluation with pupillometer based on infrared camera system (Show >>)
Exploiting FPGAs from higher level languages a signal analysis case study (Show >>)
HUGenomics: A support to personalized medicine research (Show >>)
Heterogeneous exascale supercomputing: The role of CAD in the exaFPGA project (Show >>)
On How to Design Dataflow FPGA-Based Accelerators for Convolutional Neural Networks (Show >>)
Optimizing streaming stencil time-step designs via FPGA floorplanning (Show >>)
Reconfigurable embedded systems applications for versatile biomedical measurements (Show >>)
Software Implementation and Hardware Acceleration of Retinal Vessel Segmentation for Diabetic Retinopathy Screening Tests (Show >>)
The Role of CAD Frameworks in Heterogeneous FPGA-Based Cloud Systems (Show >>)
Journal Articles
Floorplanning Automation for Partial-Reconfigurable FPGAs via Feasible Placements Generation (Show >>)
MARC: A resource consumption modeling service for self-aware autonomous agents (Show >>)
Power consumption models for multi-tenant server infrastructures (Show >>)

List of publications and reserach products for the year 2016 (Show all details | Hide all details)
Type Title of the Publicaiton/Product
Abstract in Atti di convegno
Floor plan design and automatic nodes deployment for indoor location and monitoring systems (Show >>)
Preemption-aware planning on Big-Data systems (Show >>)
Conference proceedings
A Run-Time System for Partially Reconfigurable FPGAs: The case of STMicroelectronics SPEAr board (Show >>)
A polyhedral model-based framework for dataflow implementation on FPGA devices of iterative stencil loops (Show >>)
A runtime controller for OpenCL applications on heterogeneous system architectures (Show >>)
A self-adaptive approach to efficiently manage energy and performance in tomorrow's heterogeneous computing systems (Show >>)
DockerCap: A Software-Level Power Capping Orchestrator for Docker Containers (Show >>)
EXTRA: Towards the exploitation of eXascale technology for reconfigurable architectures (Show >>)
Enabling power-awareness for the Xen hypervisor (Show >>)
FFWD: Latency-Aware Event Stream Processing via Domain-Specific Load-Shedding Policies (Show >>)
Hardware design automation of convolutional neural networks (Show >>)
On How to improve FPGA-based systems design productivity via SDAccel (Show >>)
On the automation of high level synthesis of convolutional neural networks (Show >>)
Parallel protein identification using an FPGA-based solution (Show >>)
ProFAX: A hardware acceleration of a protein folding algorithm (Show >>)
Quality of Service Driven Runtime Resource Allocation in Reconfigurable HPC Architectures (Show >>)
Resource-efficient scheduling for partially-reconfigurable FPGA-based systems (Show >>)
Ruleset Minimization in Multi-tenant Smart Buildings (Show >>)
Scala-based domain-specific language for creating accelerator-based SoCs (Show >>)
Sink state analysis in multi-tenant smart buildings (Show >>)
Towards a performance-aware power capping orchestrator for the Xen hypervisor (Show >>)
Using just-in-time code generation for transparent resource management in heterogeneous systems (Show >>)
Workload-aware power optimization strategy for asymmetric multiprocessors (Show >>)
Journal Articles
A software cache partitioning system for hash-based caches (Show >>)
Autonomic thread scaling library for QoS management (Show >>)
Special Issue on: Multicore and Many-core Architectures for Future Generation Embedded Systems (Show >>)
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Area Servizi ICT