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Information on didactic, research and institutional assignments on this page are certified by the University; more information, prepared by the professor, are available on the personal web page and in the curriculum vitae indicated on this webpage.
Information on professor
ProfessorFerrandi Fabrizio
QualificationAssociate professor full time
Belonging DepartmentDipartimento di Elettronica, Informazione e Bioingegneria
Scientific-Disciplinary SectorING-INF/05 - Information Processing Systems
Curriculum VitaeDownload CV (310.25Kb - 31/07/2019)
OrcIDhttps://orcid.org/0000-0003-0301-4419

Contacts
Professor's office hours
DepartmentFloorOfficeDayTimetableTelephoneFaxNotes
Dipartimento di Elettronica, Informazione e Bioingegneria --103ThursdayFrom 10:00
To 12:00
3479----
E-mailfabrizio.ferrandi@polimi.it
Professor's personal websitehttp://ferrandi.faculty.polimi.it/

Data source: RE.PUBLIC@POLIMI - Research Publications at Politecnico di Milano

List of publications and reserach products for the year 2020
No product yet registered in the year 2020


List of publications and reserach products for the year 2019 (Show all details | Hide all details)
Type Title of the Publicaiton/Product
Conference proceedings
Software defined architectures for data analytics (Show >>)
Journal Articles
A Design Flow Engine for the Support of Customized Dynamic High Level Synthesis Flows (Show >>)


List of publications and reserach products for the year 2018 (Show all details | Hide all details)
Type Title of the Publicaiton/Product
Journal Articles
Data Transfers Analysis in Computer Assisted Design Flow of FPGA Accelerators for Aerospace Systems (Show >>)
Enabling Automated Bug Detection for IP-based Designs using High-Level Synthesis (Show >>)


List of publications and reserach products for the year 2017 (Show all details | Hide all details)
Type Title of the Publicaiton/Product
Contributions on scientific books
Considerations on the use of custom accelerators for big data analytics (Show >>)
Journal Articles
Exploiting Vectorization in High Level Synthesis of Nested Irregular Loops (Show >>)
Using Efficient Path Profiling to Optimize Memory Consumption of On-Chip Debugging for High-Level Synthesis (Show >>)


List of publications and reserach products for the year 2016 (Show all details | Hide all details)
Type Title of the Publicaiton/Product
Abstract in Atti di convegno
A Dynamically Scheduled Architecture for the Synthesis of Graph Database Queries (Show >>)
Poster
A dynamically scheduled architecture for the synthesis of graph methods (Show >>)
Contributions on scientific books
Real-time considerations for rugged embedded systems (Show >>)
Conference proceedings
Automated bug detection for pointers and memory accesses in High-Level Synthesis compilers (Show >>)
Computer Assisted Design and Integration of FPGA Accelerators in Aerospace Systems (Show >>)
Efficient synthesis of graph methods: a dynamically scheduled architecture (Show >>)
Enabling the high level synthesis of data analytics accelerators (Show >>)
Journal Articles
A Survey and Evaluation of FPGA High-Level Synthesis Tools (Show >>)
manifesti v. 3.3.7 / 3.3.7
Area Servizi ICT
08/07/2020